In an integrated circuit, output buffers are often used at output pins to transfer signals to the signal lines. The transmission of information across the signal lines can be subject to various problems such as impedance mismatch, signal reflection, or irregular output waveform. Typically, output buffers must meet specifications dictated by application, such as maintaining a smooth and robust output waveform.
FIG. 5 shows a block diagram of a conventional output buffer 500 that can drive an output 506 between a high (e.g., VDD) and low (e.g., VSS) level in response to an input signal IN. The conventional output buffer 500 can include control logic 503, a first driver 512, a second driver 514, a p-channel output transistor 515 and an n-channel output driver transistor 517. In response to a logic output signal 502 from control logic 503, first driver 512 can drive a gate of p-channel output transistor 515 between a high power supply level (e.g., VDD) to turn the transistor off, and a low power supply level (e.g., VSS) to turn the transistor on. In an opposite fashion, in response to a logic output signal 504 from control logic 503, second driver 514 can drive a gate of n-channel output transistor 515 between a low power supply level (e.g., VSS) to turn the transistor off, and a high power supply level (e.g., VDD) to turn the transistor on. P-channel output transistor 515 and n-channel output transistor 517 can be large output driving devices and thus include relatively large gates that can present a significant capacitance to their respective drivers (512 and 514).
Control logic 503 can output signals to control the operation of the output buffer. For example, an output 506 can be driven high by turning on p-channel output transistor 515 and turning off n-channel output transistor 517, or can be driven low by turning off p-channel output transistor 515 and turning on n-channel output transistor 517. An output 506 could also be placed in a high impedance state (i.e., tristate) by turning off both output transistors (515 and 517).
A disadvantage of conventional output buffer 500 can be the limited flexibility in meeting variations arising from different applications. While a drive strength of a conventional output buffer 500 can be increased by adding additional driver devices in parallel, doing so may only just meet a minimum output impedance necessary to reduce signal reflections on a transmission line driven by the buffer.
Another disadvantage of conventional output buffer 500 can be sensitivity to operating conditions. While an output buffer 500 can be tuned to meet worst case load conditions, if an actual output transmission line is less than such worst case, it can be difficult to meet driving requirements, such as rise time and fall time, particularly across uncontrollable variations in manufacturing process, differing operating voltages, and/or temperatures.